Real-time detection of hardware trojan attacks on General-Purpose Registers in a RISC-V processor

Hardware trojans(HT) is one of the main threats for hardware security, especially attacks on General-Purpose Registers(GPRs) processors. This paper presented a novel method to detect HT induced by comparing states GPRs with an embedded reference model in real time. Firstly, instruction sequence was realigned four principles. Secondly, based stream, built. Finally, can be detected expected GPRs’ state from sampled We integrated this into RISC-V core PULpino and investigated feasibility different programs. The experimental results showed that all randomly inserted time latency two clock cycles.